Hi,
I’m following the steps to build the matrix-creator-fpga code using Xilinx ISE 14.7 Command Prompt in Windows 10 and I am running into an error.
The steps I am following are from the following link: https://github.com/matrix-io/fpga-environment-setup
matrix-creator-fpga\creator_core>make
for i in system.v creator_dcm.v rtl/wb_bram/bram.v rtl/wb_conbus/conbus_arb.v rtl/wb_conbus/conbus.v rtl/wb_mcu_bram/wb_mcu_bram.v rtl/wb_spi_slave/wb_spi_slave.v rtl/wb_spi_slave/spi_slave.v rtl/wb_uart/uart.v rtl/wb_uart/wb_uart.v rtl/wb_uart/uart_fifo.v rtl/wb_gpio/wb_gpio.v rtl/wb_gpio/pwm.v rtl/wb_gpio/core_clk.v rtl/wb_gpio/timer.v rtl/wb_gpio/timer_core.v rtl/wb_gpio/mux_io.v rtl/wb_gpio/single_mux.v rtl/wb_everloop/everloop_bram.v rtl/wb_everloop/everloop.v rtl/wb_everloop/wb_everloop.v; do echo verilog work ../$i >> build/project.src; done
i was unexpected at this time.
make: *** [build/project.src] Error 255
I’ve had a bit of progress on this. So, it looks like the Makefile is a Linux specific make file and does not work on Windows. I was able to compile the code on a CentOS 6 Xilinx ISE 14.7 config without issue. However, on Windows 10 I have had no luck.
I was able to get past the for loop errors by changing the loops to:
build/project.src:
@[ -d build ] || mkdir build
@[ -d simulation ] || mkdir simulation @rm -f $@ @echo off @for %%i in (%SRC%); do echo verilog work …/$$i >> $@; done @for %%i in (%SRC_HDL%); do echo VHDL work …/$$i >> $@; done
Also, the clean section was failing but I got it work with the following:
clean:
rm -f (wildcard *~) (wildcard*/*~) a.out (wildcard *.log) (wildcard *.key) (wildcard *.edf) (wildcard *.ps) (wildcard trace.dat)
rm -f (wildcard *.bit)
rm -rf build
I’m still having issues with the echo statements after the for loops though.
I assume what you are referring to is the Virtual Machine install of Xilinx ISE 14.7 running on a Windows 10 system via something like VirtualBox. The OS of the virtual machine is actually an Oracle Linux 6.4 OS and not Windows. This is not what I am doing. I am running Xilinx ISE 14.7 on a bare metal Windows 10 system. Although, this is not officially supported by Xilinx, there are ways to get this to run as I referred to earlier. I suppose I could try this on a Windows 8 or Windows 7 system, but I suspect I would run into the same issues since the Makefile is Linux specific. Note, ISE does run on Windows bare metal and I have worked with many systems that run earlier versions of ISE on Windows. Xilinx has elected to not support ISE 14.7 on Windows 10 bare metal, but it is still listed as supported on previous versions of Window.
I see. The instructions in our GitHub involve downloading the Oracle Linux VM which has Xilinx ISE 14.7 installed on it.
We have not tried running Xilinx ISE 14.7 on Windows 10 bare metal, but as you mentioned, there are some resources out there to help with that. Feel free to post progress updates here to help future community members who want to run Xilinx ISE directly on Windows 10.
We have successfully compiled our Spartan-6 FPGA code with Xilinx ISE on the Oracle Linux VM though, so if you want to do that, follow the directions here to install that Linux VM on Windows 10.
I appreciate your reply. I know of the VM install instructions, and my workaround was to install CentOS 6 into a VirtualBox instance and then install the Linux version of ISE 14.7 on that which works without issue. I have not tried the OVA install as of yet but it might be the best option for those not so familiar with Linux. Installing a VM is not an option in some environments though due to security issues.
It is unfortunate that Xilinx has separated support for their FPGAs between ISE and Vivado and not support ISE with the newer operating systems which is the bane of my existence at this point. However, ISE 14.7 did release in 2013 so one can not expect them to support this forever. Perhaps moving forward, MATRIX Labs should look at using a more current FPGA such as Zynq or other vendors such as Intel FPGA or even Lattice.