[Solved] Microphone Array FPGA source code


#1

Hi,

I couldn’t find the FPGA source code in GitHub for the MEMs microphone array. Is there a plan to upload it?

I would like to understand what filtering is being used to convert from PDM to PCM and play around with the sample rate, the number of microphones being used, beamforming etc

Thanks

Andrew


#2

Hi @bobsyouruncle,

We recently made available a demo for beamforming. Check this out and give us feedback.


Implementation here:

Yoel


#3

How about releasing the FPGA source (VHDL or Verilog)?


#4

Any plans to opensource the FPGA sources for this?


#5

Matrix has been advertising the Voice as though customers can reprogram the FPGA, but seems to be stalling about releasing the FPGA source code, or even the connections of FPGA pins to microphones etc that will be necessary to make any use of that capability. What’s the hangup?


#6

Agreed, it is very annoying! However you can reprogram the FPGA, and the UCF file contains the information about what pins are connected to what, although this is still not ideal, for example the ever loop only has 1 control signal so I can only assume it is some kind of multiplexing?

I’ve made a program in VHDL that demodulates a single mic signal down to 16kHz PCM signal and outputs over UART, it works just fine but in order to transmit all mic data and use higher sampling rates I need to use SPI. I’ve got a semi-working demo SPI connection but I need to make a tad more robust as getting a few errors! On that note, if anyone has a working SPI slave protocol in VHDL then it would be very much appreciated!!


#7

Hi @Jud,
Here is the current UCF file fo voice.

######################################################
######################################################
## These constraints are for MATRIX-VOICE         ##
######################################################
######################################################

######################
# Timing Constraints #
######################

##### Grouping Constraints #####
NET clk_50 TNM_NET = clk50_grp;

##### Clock Period Constraints #####
TIMESPEC TS_PER_CLK50 = PERIOD "clk50_grp" 20.0 ns HIGH 50%;

##### Grouping Constraints #####
NET rpi_sck TNM_NET = sck_grp;

##### Clock Period Constraints #####
TIMESPEC TS_PER_SCK = PERIOD "sck_grp" 20.0 ns HIGH 50%;


#######################
# Pin LOC Constraints #
#######################

# OSC
NET "clk_50"       LOC = "T7"  | IOSTANDARD = LVCMOS33;

# RESET
NET "resetn"       LOC = "E7"  | IOSTANDARD = LVCMOS33 | PULLDOWN; #RPI_GPIO12

# EVERLOOP CONTROL
NET "everloop_ctl" LOC = "A9"  | IOSTANDARD = LVCMOS33;

#######################
# RPi SPI BUS
#######################
NET "rpi_sck"      LOC = "R9"  | IOSTANDARD = LVCMOS33;
NET "rpi_mosi"     LOC = "M10" | IOSTANDARD = LVCMOS33;
NET "rpi_miso"     LOC = "M9"  | IOSTANDARD = LVCMOS33;
NET "rpi_ss"       LOC = "N9"  | IOSTANDARD = LVCMOS33;
#NET "rpi_ss"      LOC = "P9"  | IOSTANDARD = LVCMOS33;

#######################
# ESP32 SPI BUS
#######################
NET "esp_sck"      LOC = "B3"  | IOSTANDARD = LVCMOS33; #ESP_IO32
NET "esp_mosi"     LOC = "C5"  | IOSTANDARD = LVCMOS33; #ESP_IO33
NET "esp_miso"     LOC = "K6"  | IOSTANDARD = LVCMOS33; #ESP_IO21
NET "esp_ss"       LOC = "L3"  | IOSTANDARD = LVCMOS33; #ESP_IO23

NET "EN_ESP"       LOC = "A4"  | IOSTANDARD = LVCMOS33;
NET "EN_PROG_ESP"  LOC = "F3"  | IOSTANDARD = LVCMOS33;

NET "ESP_TX"       LOC = "L5"  | IOSTANDARD = LVCMOS33;
NET "ESP_RX"       LOC = "K5"  | IOSTANDARD = LVCMOS33;
NET "PI_TX"        LOC = "A12" | IOSTANDARD = LVCMOS33;
NET "PI_RX"        LOC = "B12" | IOSTANDARD = LVCMOS33;

NET "GPIO_25"      LOC = "B14" | IOSTANDARD = LVCMOS33 | PULLUP; #RPI_GPIO25 to EN_ESP
NET "GPIO_24"      LOC = "A14" | IOSTANDARD = LVCMOS33 | PULLUP; #RPI_GPIO24 to EN_PROG_ESP

NET "GPIO_12"      LOC = "N8" | IOSTANDARD = LVCMOS33 ; 
NET "GPIO_16"      LOC = "P8" | IOSTANDARD = LVCMOS33 ; 
#######################
# AUDIO OUTPUT
#######################
NET "audiol_p"     LOC = "E1"  | IOSTANDARD = LVCMOS33;
NET "audior_p"     LOC = "F1"  | IOSTANDARD = LVCMOS33;

NET "led_debug"     LOC = "T5"  | IOSTANDARD = LVCMOS33;
NET "hp_detect"     LOC = "T4"  | IOSTANDARD = LVCMOS33;

NET "hp_ctl"      LOC = "D1"  | IOSTANDARD = LVCMOS33;
NET "vol_ctl"     LOC = "C1"  | IOSTANDARD = LVCMOS33;
#######################
# MIC ARRAY           #
#######################
NET "pdm_clk"      LOC = "B5"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<0>"  LOC = "E6"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<1>"  LOC = "B8"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<2>"  LOC = "A8"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<3>"  LOC = "C7"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<4>"  LOC = "A7"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<5>"  LOC = "A6"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<6>"  LOC = "B6"  | IOSTANDARD = LVCMOS33;
NET "pdm_data<7>"  LOC = "A5"  | IOSTANDARD = LVCMOS33;
NET "mic_irq<0>"   LOC = "R7"  | IOSTANDARD = LVCMOS33; #RPI_GPIO6
NET "mic_irq<1>"   LOC = "H4"  | IOSTANDARD = LVCMOS33; #ESP_IO5

This should help you.


Matrix Voice: Beamforming, AEC, dereverberation and noise cancellation
#8

Thank you! This will be a big help.
Jud


#9

Check https://github.com/matrix-io/matrix-creator-fpga maybe you can find something useful :slight_smile:


#10

Hi Yoel! Forgot about those so I might try and steal your SPI protocol, but i don’t speak Verilog, only VHDL at the moment :frowning_face:, might have to get learning…

What exactly are those files to do with btw?? It seems like bits of it, but it surely can’t be the full HDL system files, as there doesn’t seem to any mic inputs or demodulation, have you done this part with IP cores or something?? still, can’t fully understand them until i get verilog under my belt! Ta

To add, I’ve got the creator not the voice.


#11

That code is a bit outdated but is pretty close to what is implemented in the MATRIX Creator and MATRIX Voice. As you noticed some really important stuff is not included, for example, the mic and audio processing among other parts.

In general that repo could give you some ideas and basic architecture to start with.