Hello,
i would like using a jtag-cable for Programming fpga in MATRIX voice (VHDL, standalone). It seems, that impact as part of ISE will work…
What’s about the init line of the cable: connect to pin 18 or pin 22 of the rpi-connector or open?
Is 0 or 1 necessary on pin 22 or pin 18 of the rpi-connector?
Are pull-up resistors necessary?
50MHz oscillator is connected to T7 in MATRIX voice, isn’t it (not P84 as in creator)?
Extension connector: MATRIX voice has same connections as creator (ucf)?
Thanks lot.